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? 2016 microchip technology inc. advance information ds60001409a - page 1 is2062/64 features ? qualified for bluetooth v4.2 specifications ? supports hfp 1.6, hsp 1.2, a2dp 1.3, spp 1.2 and avrcp 1.6 ? supports bluetooth low energy (ble) (fw dependent): - generic access service - device information service - proprietary services for data communication - apple notification center service (ancs) ? supports high resolution up to 24-bit, 96 khz audio data format ?i 2 s digital audio (IS2064 only), mic, analog audio, aux-in ? supports microphone inputs: 2 (is2062) and 1 (IS2064) ? uart, gpios, and leds ? supports firmware field upgrade ? battery charging baseband features ? 16 mhz main clock input ? flash memory (8 mbit) ? eeprom (128 kbit) ? connects two hosts with hfp or a2dp profiles simultaneously, and spp/ble connection to one host ? adaptive frequency hopping (afh) rf features ? class 2 output power (+2 dbm typical) ? receive sensitivity: -90 dbm (2 mbps edr) ? supports bluetooth (bdr/edr/ble) specifications (fw dependent) ? combined tx/rx rf terminal simplifies external matching and reduces external antenna switches ? tx/rx rf switch for class 2 or class 3 applica- tions ? integrated synthesizer requires no external voltage-controlled oscillator (vco), varactor diode, resonator, loop filter ? crystal oscillator with built-in digital trimming com- pensates for temperature or process variations dsp audio processing ? 32-bit dsp core ? supports 64 kbps a-law, ? -law pcm format, continuous variable slope delta (cvsd) modula- tion for synchronous connection-oriented (sco) channel operation ? supports 8/16 khz noise suppression ? supports 8/16 khz echo cancellation ? packet loss concealment (plc) ? supports serial copy management system (scms-t) content protection audio codec ? sub-band coding (sbc) and optional advanced audio coding (aac) decoding ? 20-bit digital-to-analog (dac) with 98 db snr ? 16-bit analog-to-digital (adc) with 92 db snr ? supports up to 24-bit, 96 khz on i 2 s digital audio peripherals ? high-speed host controller interface (hci)-uart (supports up to 921,600 bps) ? usb2.0 compatible interface for fw/eeprom upgrade (IS2064) ? built-in lithium-ion and lithium-polymer battery charger (up to 350 ma) ? integrated 1.8v and 3v configurable switching regulator and low-dropout (ldo) regulator ? built-in adc for battery monitoring and voltage sensor and charger thermal protection ? built-in undervoltage protection (uvp) ? led drivers: 2 (is2062) and 3 (IS2064) operating condition ? operating voltage: 3.2v to 4.2v ? temperature range: -20c to +70c package ? is2062: 7 mm x 7 mm, lga-56 package ? IS2064: 8 mm x 8 mm, lga-68 package ? 0.4 mm pitch bluetooth ? 4.2 stereo audio soc is2062_64.book page 1 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 2 advance information ? 2016 microchip technology inc. applications ? soundbars and subwoofers ? speaker phones ? headsets and headphones description the is2062/64 is a stereo audio soc qualified for bluetooth 4.2 with enhanced data rate (edr). it integrates a 32-bit dsp co-processor and a codec which is dedicated for voice and audio applications. for voice applications, continuously variable slope delta (cvsd) encoding/decoding, 8k/16k noise reduction, and echo cancellation are implemented. for audio applications, sub-band coding (sbc) and aac low- complexity (aac-lc) decoding functions are used. the is2062/64 soc features a 20-bit audio dac in addition to an i 2 s digital audio interface that supports up to 24-bit, 96 khz data formats. system optimizations include an integrated battery voltage sensor, battery charger, switching regulator, and ldo. is2062_64.book page 2 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 3 is2062/64 table of contents 1.0 device overview ............................................................................................................ .......................................... 5 2.0 audio ...................................................................................................................... ................................................ 15 3.0 transceiver ................................................................................................................ ............................................ 19 4.0 microcontroller............................................................................................................ .......................................... ..21 5.0 power management unit ...................................................................................................... .................................. 23 6.0 application information .................................................................................................... ...................................... 25 7.0 antenna placement rule ..................................................................................................... .................................. 35 8.0 electrical characteristics................................................................................................. ....................................... 37 9.0 package information ........................................................................................................ ...................................... 45 10.0 reflow profile and storage condition ...................................................................................... ............................ 53 11.0 ordering information ...................................................................................................... ...................................... 57 appendix a: reference circuit .................................................................................................. ................................... 59 appendix b: revision history .................................................................................................. ............................................................ 69 to our valued customers it is our intention to provide our valued customers with the best documentation possible to ensure successful use of your micro chip products. to this end, we will continue to improve our publications to better suit your needs. our publications will be refined and enhanced as new volumes and updates are introduced. if you have any questions or comments regar ding this publication, please contact the marketing communications department via e-mail at docerrors@microchip.com or fax the reader response form in the back of this data sheet to (480) 792-4150. we welcome your feedback. most current data sheet to obtain the most up-to-date version of this data s heet, please register at our worldwide web site at: http://www.microchip.com you can determine the version of a data sheet by examining its literature number found on the bottom outside corner of any page . the last character of the literature number is the versi on number, (e.g., ds30000000a is ve rsion a of document ds30000000). errata an errata sheet, describing minor operational differences fr om the data sheet and recommended workarounds, may exist for curren t devices. as device/documentation i ssues become known to us, we will publish an errata sheet. the errata will specify the revisi on of silicon and revision of document to which it applies. to determine if an errata sheet exists for a particul ar device, please check with one of the following: ? microchip?s worldwide web site; http://www.microchip.com ? your local microchip sales office (see last page) when contacting a sales office, please spec ify which device, revision of silicon and data sheet (include literature number) you are using. customer notification system register on our web site at www.microchip.com to receive the most current information on all of our products. is2062_64.book page 3 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 4 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 4 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 5 is2062/64 1.0 device overview the is2062/64 soc integrates a bluetooth 4.2 dual- mode radio transceiver, a power management unit (pmu), a microcontroller (mcu), an audio codec, a crystal and a 32-bit dsp. the is2062/64 soc can be configured using a ui tool. figure 1-1 illustrates a typical block diagram of the is2062/64 soc. figure 1-1: is2062/64 ster eo audio soc block diagram note: the ui tool is a windows ? -based configu- ration utility tool, which is available for download from the microchip web site at: www.microchip.com/is2062 and www.microchip.com/IS2064 . is2062_64.book page 5 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 6 advance information ? 2016 microchip technology inc. table 1-2 provides the key features of the is2062/64 soc. table 1-1: is2062/64 key features feature is2062 IS2064 application headset/speaker speaker stereo/mono stereo stereo pin count 56 68 dimensions (mm 2 ) 7 x 7 8 x 8 audio dac output 2 channel 2 channel dac (single-ended) snr at 2.8v (db) -98 -98 dac (capless) snr at 2.8v (db) -96 -96 adc snr at 2.8v (db) -92 -92 i 2 s digital interface no yes analog aux-in yes yes mono microphones 2 1 external audio amplifier interface yes yes uart yes yes led driver 2 3 internal dc-dc step-down regulator yes yes dc 5v adaptor input yes yes battery charger (350 ma max) yes yes adc for thermal charger protection yes yes undervoltage protection yes yes gpio 10 15 button support 6 6 nfc (triggered by external nfc) yes yes eeprom 128 k 128 k customized voice prompt store in eeprom multi-tone yes yes dsp sound effect yes yes ble yes yes bluetooth profiles hfp 1.6 1.6 avrcp 1.6 1.6 a2dp 1.3 1.3 hsp 1.2 1.2 spp 1.2 1.2 is2062_64.book page 6 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 7 is2062/64 figure 1-2 illustrates the is2062 soc pin diagram. table 1-2 provides the pin descriptions of the is2062 soc and these pins can be configured using the ui tool. figure 1-2: is2062 soc pin diagram is2062_64.book page 7 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 8 advance information ? 2016 microchip technology inc. table 1-2: is2062 soc pin descriptions pin no pin type name description 1 p vcom internal biasing voltage for codec; connect to gnd through a 1 f (x5r/x7r) capacitor 2 i mic_n2 mic 2 mono differential analog negative input 3 i mic_p2 mic 2 mono differential analog positive input 4 i mic_n1 mic 1 mono differential analog negative input 5 i mic_p1 mic 1 mono differential analog positive input 6 p mic_bias electric mic biasing voltage 7 i air r-channel, single-ended analog input 8 i ail l-channel, single-ended analog input 9 p vdd_core core 1.2v power input; connect to the cldo_o pin; connect to gnd through a 1 f (x5r/x7r) capacitor 10 o p1_2 i 2 c scl (eeprom) 11 i/o p1_3 i 2 c sda (eeprom), requires external pull-up resistor 12 i rst_n system reset (active-low) 13 p vdd_io i/o power supply input (3.0v~3.6v); connect to ldo31_vo (pin # 22); connect to gnd through a 1 f (x5r/x7r) capacitor 14 i/o p0_1 configurable control or indication pin (internally pulled up if configured as an input) ? fwd key when class 2 rf (default), active-low ? class1 tx control signal for external rf t/r switch, active-high 15 i p2_4 system configuration pin along with p2_0 and ean pins can be used to set the soc in any one of the fol- lowing modes: ? application mode (for normal operation) ? test mode (to change eeprom values) ? write flash mode (to load a new firmware into the soc), see ta b l e 6 - 1 16 i/o p0_4 configurable control or indication pin (internally pulled up if configured as an input) ? nfc detection pin, active-low ? out_ind_1 17 i/o p1_5 configurable control or indication pin (internally pulled up if configured as an input) ? nfc detection pin, active-low ? out_ind_1 ? slide switch detector 18 i hci_rxd hci uart data input 19 o hci_txd hci uart data output 20 p codec_vo ldo output for codec power 21 p ldo31_vin ldo input, connect to sys_pwr (pin # 27) 22 p ldo31_vo 3v ldo output for vdd_io power, do not calibrate 23 p adap_in 5v power adaptor input 24 p bat_in battery input. voltage range: 3.2v to 4.2v is2062_64.book page 8 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 9 is2062/64 25 i amb_det analog input for ambient temperature detection 26 p sar_vdd sar 1.8v input; connect to bk_o pin 27 p sys_pwr power output from bat_in or adap_in for is2062 only 28 p bk_vdd 1.8v buck v dd power input; connect to sys_pwr pin 29 p bk_lx 1.8v buck pwm/pfm output 30 p bk_o 1.8v buck feedback input 31 i mfb ? multi-function button and power-on key ? uart rx ind, active-high 32 i led1 led driver 1 33 i led2 led driver 2 34 i/o p0_0 configurable control or indication pin (internally pulled up if configured as an input) ? slide switch detector, active-low ? uart tx_ind, active-low 35 i/o p0_3 configurable control or indication pin (internally pulled up if configured as an input) ? rev key (default), active-low ? buzzer signal output ? out_ind_2 ? class1 rx control signal of external rf t/r switch, active-high 36 i ean system configuration pin along with the p2_4 and p2_0 pins can be used to set the soc in any one of the fol- lowing modes: ? application mode (for normal operation) ? test mode (to change eeprom values) ? write flash mode (to load a new firmware into the soc), see ta b l e 6 - 1 37 p cldo_o 1.2v core ldo output 38 p pmic_in 1.8v power input for internal blocks; connect to bk_o (pin # 30) 39 p rfldo_o 1.28v rf ldo output 40 p vbg bandgap output reference for decoupling interference 41 p ulpc_vsus ulpc 1.2v output power 42 i xo_n 16 mhz crystal input negative 43 i xo_p 16 mhz crystal input positive 44 p vcc_rf rf power input (1.28v) for both synthesizer and tx/rx block 45 i/o rtx rf path (transmit/receive) 46 i p0_2 configurable control or indication pin (internally pulled up if configured as an input) play/pause key (default), active-low table 1-2: is2062 soc pin descriptions (continued) pin no pin type name description is2062_64.book page 9 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 10 advance information ? 2016 microchip technology inc. legend: i= input pin o= output pin i/o= input/output pin p= power pin note: the is2062 soc pins can be configured using the ui tool. 47 i p2_0 system configuration pin along with p2_4 and ean pins can be used to set the soc in any one of the fol- lowing modes: ? application mode (for normal operation), ? test mode (to change eeprom values) ? write flash mode (to load a new firmware into the soc), see ta b l e 6 - 1 48 i p2_7 configurable control or indication pin (internally pulled up if configured as an input) volume-up key (default) 49 i p3_0 configurable control or indication pin (internally pulled up if configured as an input) aux-in detector 50 i p0_5 configurable control or indication pin (internally pulled up if configured as an input) volume-up key (default) 51 p vdd_io i/o power supply input (3.0v~3.6v); connect to ldo31_vo pin 52 o aohpr r-channel analog headphone output, 53 p vddao power supply dedicated to codec output amplifiers; connect to codec_vo pin 54 o aohpm headphone common mode output/sense input 55 o aohpl l-channel analog headphone output 56 p vdda power supply or reference voltage for external codec; connect to codec_vo pin 57-64 p ep exposed pads. used as ground (gnd) pins table 1-2: is2062 soc pin descriptions (continued) pin no pin type name description is2062_64.book page 10 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 11 is2062/64 figure 1-3 illustrates the pin diagram of the IS2064 soc. figure 1-3: IS2064 soc pin diagram is2062_64.book page 11 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 12 advance information ? 2016 microchip technology inc. table 1-3 provides the pin descriptions of the IS2064 soc. table 1-3: IS2064 soc pin descriptions pin no pin type name description 1 p vddao power supply dedicated to codec output amplifiers; connect to the codec_vo pin 2 o aohpm headphone common mode output or sense input 3 o aohpl headphone output, left channel 4 p vdda power supply or reference voltage for external codec; connect to the codec_vo pin 5 p vcom internal biasing voltage for codec 6 i mic_n1 mic 1 mono differential analog negative input 7 i mic_p1 mic 1 mono differential analog positive input 8 p mic_bias electric microphone biasing voltage 9 i air r-channel single-ended analog input 10 i ail l-channel single-ended analog input 11 p vdd_core core 1.2v power input; connect to the cldo_o pin 12 o p1_2 i 2 c scl (eeprom) 13 i/o p1_3 i 2 c sda (eeprom), requires external pull-up resistor 14 i rst_n system reset (active-low) 15 p vdd_io i/o power supply input (3.0v~3.6v); connect to ldo31_vo (pin # 24); connect to gnd through a 1 f (x5r/x7r) capacitor 16 i/o p0_1 configurable control or indication pin (internally pulled up if configured as an input) ? fwd key when class 2 rf (default), active-low ? class1 tx control signal for external rf tx/rx switch, active-high 17 i p2_4 system configuration pin along with the p2_0 and ean pins, used to set the soc in any one of the following modes: ? application mode (for normal operation) ? test mode (to change eeprom values) ? write flash mode (to load a new firmware into the soc), see ta b l e 6 - 1 18 i/o p0_4 configurable control or indication pin (internally pulled up if configured as an input) ? nfc detection pin, active-low ? out_ind_1 19 i/o p1_5 configurable control or indication pin (internally pulled up if configured as an input) ? nfc detection pin ? slide switch detector, active-high ? out_ind_1 ? multi-speaker master/slave mode control (fw dependent) 20 i hci_rxd hci uart data input 21 o hci_txd hci uart data output 22 p codec_vo ldo output for codec power 23 p ldo31_vin ldo input; connect to sys_pwr (pin # 29) is2062_64.book page 12 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 13 is2062/64 24 p ldo31_vo 3v ldo output, for vdd_io power, do not calibrate 25 p adap_in 5v power adaptor input 26 p bat_in battery input. voltage range: 3.2v to 4.2v 27 i amb_det analog input for ambient temperature detection 28 p sar_vdd sar 1.8v input; connect to bk_o pin 29 p sys_pwr power output which come from bat_in or adap_in 30 p bk_vdd 1.8v buck vdd power input; connect to sys_pwr pin 31 p bk_lx 1.8v buck pwm/pfm output 32 p bk_o 1.8v buck feedback input 33 i mfb 1. multi-function button and power-on key 2. uart rx_ind, active-high 34 i led3 led driver 3 35 i led2 led driver 2 36 i led1 led driver 1 37 i/o p3_7 configurable control or indication pin (internally pulled up if configured as an input) uart tx_ind, active-low 38 i/o p3_5 configurable control or indication pin (internally pulled up if configured as an input) 39 i/o p0_0 configurable control or indication pin (internally pulled up if configured as an input) slide switch detector, active-high 40 i/o p0_3 configurable control or indication pin (internally pulled up if configured as an input) ? rev key, active-low. ? buzzer signal output ? out_ind_2 ? class 1 rx control signal of external rf t/r switch, active-high 41 i ean system configuration pin along with the p2_0 and p2_4 pins, used to set the is2062/64 soc in any one of the following modes: ? application mode (for normal operation) ? test mode (to change eeprom values) ? write flash mode (to load a new firmware into the soc), see ta b l e 6 - 1 42 p avdd_usb usb power input; connect to ldo31_vo pin 43 i/o dm differential data-minus usb 44 i/o dp differential data-positive usb 45 p cldo_o 1.2v core ldo output 46 p pmic_in 1.8v power input for internal blocks; connect to bk_o (pin # 32) 47 p rfldo_o 1.28v rf ldo output 48 p vbg bandgap output reference for decoupling interference 49 p ulpc_vsus ulpc 1.2v output power, maximum loading 1 ma 50 i xo_n 16 mhz crystal input negative 51 i xo_p 16 mhz crystal input positive table 1-3: IS2064 soc pin descriptions (continued) pin no pin type name description is2062_64.book page 13 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 14 advance information ? 2016 microchip technology inc. legend: i= input pin o= output pin i/o= input/output pin p= power pin note: these pins can be configured using the ui tool. 52 p vcc_rf rf power input for both synthesizer and tx/rx block 53 i/o rtx rf path (transmit/receive) 54 i/o p3_1 configurable control or indication pin (internally pulled up if configured as an input) rev key when class 1 rf (default), active-low 55 i/o p3_3 configurable control or indication pin (internally pulled up if configured as an input) fwd key when class 1 rf (default), active-low 56 i/o p3_6 configurable control or indication pin (internally pulled up if configured as an input) multi-spk master/slave mode control (fw dependent) 57 i/o p0_2 configurable control or indication pin (internally pulled up if configured as an input) play/pause key as the default setting 58 i/o p2_0 system configuration pin along with the ean and p2_4 pins can be used to set the soc in any one of the fol- lowing modes: ? application mode (for normal operation), ? test mode (to change eeprom values), and ? write flash mode (to load a new firmware into the soc), see ta b l e 6 - 1 59 i/o p2_7 configurable control or indication pin (internally pulled up if configured as an input) volume-up key (default) 60 i/o p3_0 configurable control or indication pin (internally pulled up if configured as an input) aux-in detector 61 i/o tfs0 i 2 s interface: left/right clock 62 i/o p0_5 configurable control or indication pin (internally pulled up if configured as an input) volume down key (default) 63 p vdd_io i/o power supply input (3.0v~3.6v); connect to ldo31_vo pin 64 i/o dr0 i 2 s interface: digital left/right data 65 i/o rfs0 i 2 s interface: left/right clock 66 i/o sclk0 i 2 s interface: bit clock 67 i/o dt0 i 2 s interface: digital left/right data 68 o aohpr headphone output, right channel 69-83 p ep exposed pads, used as ground (gnd) pins table 1-3: IS2064 soc pin descriptions (continued) pin no pin type name description is2062_64.book page 14 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 15 is2062/64 2.0 audio the input and output audios have different stages and each stage can be programmed to vary the gain response characteristics. for microphone, both single-end inputs and differential inputs are supported. to maintain a high quality signal, a stable bias voltage source to the condenser microphone?s fet is provided. the dc blocking capacitors can be used at both positive and negative sides of the input. internally, this analog signal is converted to 16-bit, 8/16 khz linear pcm data. 2.1 digital signal processor a digital signal processor (dsp) is used to perform speech and audio processing. the advanced speech features, such as acoustic echo cancellation and noise reduction are in-built. to reduce nonlinear distortion and help echo cancellation, an outgoing signal level to the speaker will exceed the threshold (and therefore likely to create echo). this may result in suppression of the signal. adaptive filtering is also applied to track the echo path impulse in response to provide echo free and full-duplex user experience. the embedded noise reduction algorithm helps to extract clean speech sig- nals from the noisy inputs captured by microphones and improves mutual understanding in communication. advanced audio features, such as multi-band dynamic range control, parametric multi-band equalizer, audio widening and virtual bass are in-built. the audio effect algorithms are to improve the user?s audio listening experience in terms of better quality audio after audio signal processing. figure 2-1 and figure 2-2 illustrate the processing flow of speaker phone applications for speech and audio signal processing. figure 2-1: speech processing figure 2-2: audio processing is2062_64.book page 15 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 16 advance information ? 2016 microchip technology inc. the dsp parameters can be configured using the dsp tool. for additional information on the dsp tool, refer to the ?is206x dsp application note ?. 2.2 codec the built-in codec has a high signal-to-noise ratio (snr) performance and it consist of an analog-to-digi- tal converter (adc), a digital-to-analog converter (dac) and additional analog circuitry. figure 2-3 through figure 2-6 illustrate dynamic range and fre- quency response of the codec. figure 2-3: codec dac dynamic range figure 2-4: codec dac thd+n versus input power note: the dsp tool and is206x dsp applica- tion note are available for download from the microchip web site at: www.microchip.com/is2062 and www.microchip.com/IS2064 . note: the data corresponds to 16 ohm load with 2.8v operating voltage and 25oc operating temperature. note: the data corresponds to 16 ohm load with 2.8v operating voltage and 25oc operating temperature. is2062_64.book page 16 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 17 is2062/64 figure 2-5: codec dac frequenc y response (capless mode) figure 2-6: codec dac frequency response (single-ended mode) note: the frequency response corresponds to single-ended mode with a 47 f dc block capacitor. is2062_64.book page 17 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 18 advance information ? 2016 microchip technology inc. 2.3 auxiliary port the is2062/64 soc supports one analog (line-in) sig- nal from external audio source. the analog (line-in) sig- nal can be processed by the dsp to generate different sound effects, multi-band dynamic range compression and audio widening, which can be setup by using the dsp tool. 2.4 analog speaker output the is2062/64 soc supports the following speaker output modes: ? capless mode ? recommended for headphone applications in which capless output connection helps to save the bom cost by avoiding a large dc blocking capacitor. figure 2-7 illustrates the analog speaker output capless mode. ? single-ended mode ? used for driving an exter- nal audio amplifier where a dc blocking capacitor is required. figure 2-8 illustrates the analog speaker output single-ended mode. figure 2-7: analog speaker output capless mode figure 2-8: analog speaker output single-ended mode is2062_64.book page 18 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 19 is2062/64 3.0 transceiver the is2062/64 soc is designed and optimized for bluetooth 2.4 ghz systems. it contains a complete radio frequency transmitter/receiver section. an inter- nal synthesizer generates a stable clock to synchronize with another device. 3.1 transmitter the internal power amplifier (pa) has a maximum out- put power of +4 dbm. this is applied for class 2 or class 3 radios without an external rf pa. the transmitter directly performs iq conversion to min- imize the frequency drift. 3.2 receiver the low-noise amplifier (lna) operates with tr- combined mode for single port application. it can save a pin on package without having an external tx/rx switch. the adc is used to sample the input analog signal and convert it into digital signal for de-modulator analysis. a channel filter has been integrated into receiver channel before the adc, which is used to reduce the external component count and increase the anti-interference capability. the image rejection filter is used to reject image frequency for low-if architecture. this filter for low-if architecture is intended to reduce external band pass filter (bpf) component for super heterodyne architecture. received signal strength indicator (rssi) signal feed- back to the processor is used to control the rf output power to make a good trade-off for effective distance and current consumption. 3.3 synthesizer a synthesizer generates a clock for radio transceiver operation. there is a vco inside, with a tunable inter- nal lc tank that can reduce variation for components. a crystal oscillator with an internal digital trimming cir- cuit provides a stable clock for synthesizer. 3.4 modem for bluetooth 1.2 specification and below, 1 mbps was the standard data rate based on gaussian frequency shift keying (gfsk) modulation scheme. this basic rate modem meets basic data rate (bdr) require- ments of bluetooth 2.0 with enhanced data rate (edr) specification. for bluetooth 2.0 and above specifications, edr has been introduced to provide data rates of 1/2/3 mbps. for baseband, both bdr and edr utilize the same 1 mhz symbol rate and 1.6 khz slot rate. for bdr, symbol 1 represents 1-bit. however, each symbol in the payload part of edr packets represents 2-bit or 3-bit. this is achieved by using two different modulations, /4 dqpsk and 8 dpsk. 3.5 adaptive frequency hopping (afh) the is2062/64 soc has an afh function to avoid rf interference. it has an algorithm to check the nearby interference and to choose the clear channel for trans- ceiver bluetooth signal. is2062_64.book page 19 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 20 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 20 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 21 is2062/64 4.0 microcontroller a microcontroller is built into an soc to execute the bluetooth protocols. it operates from 16 mhz to higher frequencies where the firmware can dynamically adjust the trade-off between the computing power and the power consumption. in rom version, the mcu firm- ware is hard-wired to minimize power consumption and to save the external flash cost. 4.1 memory there are sufficient rom and ram to fulfill the require- ment of processor, in which a synchronous single port ram interface is used. the register bank, dedicated single port memory and flash memory are connected to the processor bus. the processor coordinates all the link control procedures and data movement using a set of pointer registers. 4.2 external reset the is2062/64 soc provides a watchdog timer (wdt) to reset the soc. it has an integrated power-on reset (por) circuit that resets all circuits to a known power-on state. this action can also be driven by an external reset signal which is used to control the device externally by forcing it into a por state. the rst_n signal input is active-low and no connection is required in most of the applications. 4.3 reference clock the is2062/64 soc is composed of an integrated crys- tal oscillation function that uses a 16 mhz, 10 ppm external crystal and two specified loading capacitors to provide a high quality system reference timer source. this feature is typically used to remove the initial toler- ance frequency errors associated with the crystal and its equivalent loading capacitance in mass production. frequency trim is achieved by adjusting the crystal loading capacitance through the on-chip trim capaci- tors (c trim ). the value of trimming capacitance is 200 ff (200x10 -15 f) per lsb at 5-bit word and the overall adjustable clock frequency is 50 khz (based on crystal with load capacitance, c l spec = 9 pf). figure 4-1 illus- trates the crystal connection of the is2062/64 soc with two capacitors. figure 4-1: crystal connection is2062_64.book page 21 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 22 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 22 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 23 is2062/64 5.0 power management unit the is2062/64 soc has an integrated power manage- ment unit (pmu). the main features of the pmu are a lithium-ion and lithium-polymer battery charger and voltage regulation. a power switch is used to switch over the power source between a battery and an adap- tor. the pmu also provides current for driving leds. 5.1 charging a battery the is2062/64 soc has a built-in battery charger which is optimized for lithium-ion and lithium-polymer batter- ies. the charger includes a current sensor for charging control, user programmable current regulator and high accuracy voltage regulator. the charging current parameters are configured by using the ui tool. whenever an adaptor is plugged-in, the charging circuit become activated. reviving, pre-charging, constant current and constant voltage modes and re-charging functions are included. the maximum charging current is 350 ma. figure 5-1 illus- trates the charging curve of a battery. figure 5-1: battery charging curve 5.2 voltage monitoring a 10-bit, successive approximation adc (sar adc) provides a dedicated channel for voltage level detec- tion. the warning level can be programmed by using the ui tool. the adc provides a granular resolution to enable the mcu to take control over the charging pro- cess. 5.3 ldo a built-in low-dropout regulator (ldo) is used to convert the battery or adaptor power for power supply. it also integrates hardware architecture to control the power on/off procedure. the built-in programmable ldos provide power for codec and digital i/o pads. also, it is used to buffer the high input voltage from battery or adapter. this ldo requires 1 f bypass capacitor. 5.4 switching regulator the built-in programmable output voltage regulator can convert the battery voltage to rf and baseband core power supply. this converter has a high conversion efficiency and a fast transient response. 5.5 led driver the is2062 soc has two led drivers and the IS2064 soc has three led drivers. the led drivers provide enough sink current (16-step control and 0.35 ma for each step) and the led can be connected directly to the is2062/64 soc. the led settings can be config- ured using the ui tool. figure 5-2 illustrates the led driver details. is2062_64.book page 23 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 24 advance information ? 2016 microchip technology inc. figure 5-2: led driver 5.6 under voltage protection when the sys_pwr pin voltage drops below 2.9v, the system will shut-down automatically. 5.7 ambient detection the is2062/64 soc has a built-in adc for charger ther- mal protection. figure 5-3 illustrates the suggested circuit and thermistor, murata ncp15wf104f. the charger thermal protection can avoid battery charge in restricted temperature range. the upper and lower limits for temperature values are configured by using the ui tool. figure 5-3: ambient detection note: led3 is only applicable for the IS2064 soc. note: thermistor should be placed close to the battery in the user application for accurate temperature measurements and to enable thermal shutdown feature. is2062_64.book page 24 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 25 is2062/64 6.0 application information 6.1 power supply figure 6-1 illustrates the connection from the bat_in pin to any other voltage supply pins of the is2062/64 soc. the is20/62/64 soc is powered through the bat_in input pin. if battery is not connected, an external power supply must be provided as an input to the adap_in pin. figure 6-1: power tree diagram note: when external power supply is connected to the adap_in pin of the is2062/64 soc, the bat_in pin can be left open if battery is not connected. is2062_64.book page 25 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 26 advance information ? 2016 microchip technology inc. 6.2 host mcu interface figure 6-2 illustrates the uart interface between the is2062/64 soc and mcu. figure 6-2: host mcu interface over uart the mcu can control the is2062/64 soc over the uart interface and wakeup the soc using the mfb pins, p0_0 (is2062) and p3_7 (IS2064). refer to the " uart_commandset " document for a list of functions the is2062/64 soc supports and how to use the ui tool to set up the system using the uart command, which is available for download from the microchip web site at: www.microchip.com/is2062 and www.microchip.com/IS2064 . figure 6-3 through figure 6-8 illustrate the various uart control signal timing sequences. is2062_64.book page 26 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 27 is2062/64 figure 6-3: power on/off sequence
is2062/64 ds60001409a - page 28 advance information ? 2016 microchip technology inc. figure 6-4: timing sequence of rx indication after power on figure 6-5: timing sequence of power off note 1: eeprom clock = 100 khz. 2: for a byte write, 0.01 ms x 32 clock x 2 = 640 s. 3: it is recommended to have ramp-down time more than 640 s during power-off sequence to ensure safe operation of the device. is2062_64.book page 28 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 29 is2062/64 figure 6-6: timing sequence of power on (nack) figure 6-7: reset timing sequence in case of no response from soc to host mcu note: if host mcu sends a uart command and the soc does not respond, the mcu resends the uart com- mand. if the soc does not respond within 5 secs, the mcu will force the system to reset. is2062_64.book page 29 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 30 advance information ? 2016 microchip technology inc. figure 6-8: timing sequence of power drop protection note 1: it is recommended to use the battery to provide the power supply at bat_in to the soc. 2: if an external power source or a power adapter is utilized to provide power to the soc (adap_in), use a voltage supervisor ic. 3: the reset ic output pin must be ?open drain? with delay time Q 10 ms, and the recommended part is g691l293t73. is2062_64.book page 30 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 31 is2062/64 6.3 configuring and programming configuration and firmware programming modes are entered according to the system configuration i/o pins. table 6-1 provides the system configuration set- tings. the p2_ 0, p2_4 and ean pins have internal pull ups . table 6-1: system configuration settings p2_0 p2_4 ean operating mode high high flash code: low; rom code: high app mode (normal operation) low high flash code: low; rom code: high test mode (write eeprom) low low high write flash is2062_64.book page 31 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 32 advance information ? 2016 microchip technology inc. 6.4 general purpose i/o pins the is2062 soc provides 10 gpios and the IS2064 soc provides 15 gpios, and these gpios can be con- figured using the ui tool. tab l e 6 - 2 through table 6-5 provide the gpio configuration details of the is2062/64 soc. the mfb pin must be configured as the power on/off key and the remaining pins can be configured for any one of the default functions as provided in table 6-2 and ta b l e 6 - 3 . some pins can be configured to indicate or control the external devices. the most popular applications are nfc for easy pairing and buzzer for indication and external audio amplifier for loud speaker. table 6-2: is2062 i/o pin configuration i/o pin name default functions mfb power on/off p0_2 play/pause p2_7 volume up p0_5 volume down p0_1 fwd p0_3 rev table 6-3: IS2064 i/o pin configuration i/o pin name default functions mfb power on/off p0_2 play/pause p2_7 volume up p0_5 volume down p3_3 fwd p3_1 rev table 6-4: is2062 i/o pin (for additional functions) i/o configurable features functions p1_5 slide switch p0_4 nfc detect p0_4 / p1_5 external amp enable table 6-5: IS2064 i/o pin for added functions i/o configurable features functions p1_5 slide switch p0_4 nfc detect p0_4 / p1_5 external amp enable is2062_64.book page 32 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 33 is2062/64 6.5 i 2 s mode application the IS2064 soc provides an i 2 s digital audio output interface to connect with the external codec or dsp. it provides 8, 16, 44.1, 48, 88.2 and 96 khz sampling rates for 16-bit and 24-bit data formats. the i 2 s setting can be configured by using the ui and dsp tools. the external codec or dsp interfaces with these pins: sclk0, rfs0, dr0, and dt0 (pin no. 3, 2, 1, and 4). figure 6-9 and figure 6-10 illustrate the i 2 s signal con- nection between the IS2064 soc and an external dsp. use the dsp tool to configure the IS2064 soc as mas- ter/slave. for additional information on timing specifications, refer to 8.1 ?timing specifications ? . figure 6-9: IS2064 in i 2 s master mode figure 6-10: IS2064 slave mode is2062_64.book page 33 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 34 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 34 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 35 is2062/64 7.0 antenna placement rule antenna placement affects the whole system perfor- mance of the bluetooth integrated product. antenna requires free space to radiate rf signals and it should not be surrounded by the gnd plane. figure 7-1 illustrates a typical example of the antenna placement on the main application board with the gnd plane. figure 7-1: antenna placement examples figure 7-2 illustrates the keep-out area recommended for the antenna. figure 7-2: keep out area recommendation for antenna for additional information on the antenna placement, refer to the specific antenna data sheet of the antenna manufacturer. is2062_64.book page 35 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 36 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 36 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 37 is2062/64 8.0 electrical characteristics this section provides an overview of the is2062/64 stereo audio soc electrical characteristics. additional information will be provided in future revisions of this document as it becomes available. absolute maximum ratings for the is2062/64 devices are listed below. exposure to these maximum rating conditions for extended periods may affect device reliability. functional operation of the device at these or any other conditions, above the parameters indicated in the operation listings of this specification, is not implied. absolute maximum ratings ambient temperature under bias................................................................................................. ............. .-20c to +70c storage temperature ........................................................................................................... .................. .-65c to +150c digital core supply voltage vdd_core .......................................................................................... .......... 0v to +1.35v rf supply voltage vcc_rf ...................................................................................................... ................. 0v to +1.35v sar adc supply voltage sar_vdd ................................................................................................ ........... 0v to +2.1v codec supply voltage vdda/vddao ................................................................................................ ........... 0v to +3.3v i/o supply voltage vdd_io ...................................................................................................... ..................... 0v to +3.6v buck supply voltage bk_vdd..................................................................................................... .................. 0v to +4.3v supply voltage ldo31_vin ....................................................................................................... ................... 0v to +4.3v battery input voltage bat_in ................................................................................................... ..................... 0v to +4.3v adapter input voltage adap_in.................................................................................................. ..................... 0v to +7v note: stresses listed under ? absolute maximum ratings ? may cause permanent damage to the device. this is a stress rating only. the functional operation of the device at those or any other conditions and those indi- cated in the operation listings of this specification, is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. is2062_64.book page 37 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 38 advance information ? 2016 microchip technology inc. table 8-1 through tab le 8 -1 0 provide the recom- mended operating conditions and the electrical specifi- cations of the is2062/64 soc. note: the pmu output powers, bk_o, codec_vo, rfldo_o and cldo_o, can be programmed through the eeprom parameters. table 8-1: recommended operating condition symbol parameter min. typical max. unit vdd_core digital core supply voltage 1.14 1.2 1.26 v vcc_rf rf supply voltage 1.22 1.28 1.34 v sar_vdd sar adc supply voltage 1.62 1.8 1.98 v vdda/vddao codec supply voltage 1.8 2.8 3.0 v vdd_io i/o supply voltage 3.0 3.3 ? v bk_vdd buck supply voltage 3 3.8 4.25 v ldo31_vin supply voltage 3 3.8 4.25 v bat_in input voltage for battery 3.2 3.8 4.25 v adap_in input voltage for adaptor 4.5 5 5.5 v t operation operation temperature -20 +25 +70 oc is2062_64.book page 38 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 39 is2062/64 note 1: test condition: temperature +25 oc and wired inductor 10 h. 2: these parameters are characterized, but not tested in manufacturing. note 1: test condition: temperature +25 oc. 2: these parameters are characterized but not tested in manufacturing. note 1: headroom = v adap_in - v bat . 2: when v adap_in - v bat > 2v, the maximum fast charge current is 175 ma for thermal protection. 3: these parameters are characterized but not tested in manufacturing. table 8-2: buck switching regulator ( 2 ) parameter min. typical max. unit input voltage 3.0 3.8 4.25 v output voltage (i load = 70 ma, v in = 4v) 1.7 1.8 2.05 v output voltage accuracy ? 5 ? % output voltage adjustable step ? 50 ? mv/step output adjustment range -0.1 ? +0.25 v average load current (i load )120??ma conversion efficiency (bat = 3.8v, i load = 50 ma) ( note 2 ) ?88?% quiescent current (pfm) ? ? 40 a output current (peak) 200 ? ? ma shutdown current ? ? <1 a table 8-3: low drop regulator ( 1 , 2 ) parameter min. typical max. unit input voltage 3.0 3.8 4.25 v output voltage codec_vo ? 2.8 ? v ldo31_vo ? 3.3 ? output accuracy (v in = 3.7v, i load = 100 ma, +27 oc) ? 5 ? % output current (average) ? ? 100 ma drop-out voltage (i load = maximum output current) ?? 300mv quiescent current (excluding load, i load < 1 ma) ?45 ? a shutdown current ? ? <1 a table 8-4: battery charger ( 1 , 3 ) parameter min. typical max. unit input voltage (adap_in) 4.5 5.0 5.5 v supply current to charger only ? 3 4.5 ma maximum battery fast charge current headroom > 0.7v (adap_in = 5v) ? 350 ? ma headroom = 0.3v~0.7v (adap_in = 4.5v) ( note 2 ) ? 175 ? ma trickle charge voltage threshold ?3?v battery charge termination current, (% of fast charge current) ?10?% is2062_64.book page 39 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 40 advance information ? 2016 microchip technology inc. note 1: test condition: bk_o = 1.8v with temperature +25 oc. 2: these parameters are characterized but not tested in manufacturing. note 1: f in =1 khz, b/w=20~20 khz, a-weighted, thd+n < 0.01%, 0dbfs signal, load = 100 kohm. 2: f in = 1 khz, b/w = 20~20 khz, a-weighted, -1dbfs signal, load=16 ohm. 3: f in = 1 khz, b/w = 20~20 khz, a-weighted, thd+n < 0.05%, 0dbfs signal, load = 16 ohm. 4: these parameters are characterized but not tested in manufacturing. table 8-5: led driver ( 1 , 2 ) parameter min. typical max. unit open-drain voltage ? ? 3.6 v programmable current range 0 ? 5.25 ma intensity control ? 16 ? step current step ? 0.35 ? ma power down open-drain current ? ? 1 a shutdown current ? ? 1 a table 8-6: audio codec digital to analog converter ( 4 ) t = +25 o c, vdd = 2.8v, 1 khz sine wave input, bandwidth = 20 hz~20 khz parameter (condition) min. typical max. unit output sampling rate ? 128 ? f s resolution 16 ? 20 bit output sample rate 8 ? 48 khz signal to noise ratio ( note 1 ) (snr @cap-less mode) for 48 khz ?96?db signal to noise ratio ( note 1 ) (snr @single-end mode) for 48 khz ?98?db digital gain -54 ? 4.85 db digital gain resolution ? 2~6 ? db analog gain -28 ? 3 db analog gain resolution ? 1 ? db output voltage full-scale swing (avdd = 2.8v) 495 742.5 ? mv/rms maximum output power (16 ohm load) ? 34.5 ? mw maximum output power (32 ohm load) ? 17.2 ? mw allowed load resistive ? 16 o.c. ohm capacitive ? ? 500 pf thd+n (16 ohm load) ( note 2 )?0.05?% signal to noise ratio (snr @ 16 ohm load) ( note 3 ) ? ? 98 ? db is2062_64.book page 40 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 41 is2062/64 note 1: f in =1 khz, b/w=20~20 khz, a-weighted, thd+n < 1%, 150 mvpp input. 2: these parameters are characterized but not tested in manufacturing. note 1: the rf tx power is modulation value. 2: the rf transmit power is calibrated during production using mp tool software and mt8852 bluetooth test equipment. 3: test condition: vcc_rf = 1.28v, temperature +25 oc. note 1: test condition: vcc_rf = 1.28v, temperature +25 oc. 2: these parameters are characterized, but not tested in manufacturing. table 8-7: audio codec analog to digital converter ( 2 ) t = +25 o c, vdd = 2.8v, 1 khz sine wave input, bandwidth = 20 hz~20 khz parameter (condition) min. typical max. unit resolution ? ? 16 bit output sample rate 8 ? 48 khz signal to noise ratio ( note 1 ) (snr @mic or line-in mode) ?92?db digital gain -54 ? 4.85 db digital gain resolution ? 2~6 ? db mic boost gain ? 20 ? db analog gain ? ? 60 db analog gain resolution ? 2.0 ? db input full-scale at maximum gain (differential) ? 4 ? mv/rms input full-scale at minimum gain (differential) ? 800 ? mv/rms 3 db bandwidth ? 20 ? khz microphone mode (input impedance) ? 24 ? kohm thd+n (microphone input) at 30mvrms input ? 0.02 ? % table 8-8: transmitter section for bdr and edr ( 1 , 2 ) parameter min. typical max. bluetooth specification unit transmit power ? 2 ( 3 ) 4-6 to 4dbm relative transmit power -4 -1.8 1 -4 to 1 db table 8-9: receiver section for bdr and edr ( 1 , 2 ) modulation min. typical max. bluetooth specification unit sensitivity at 0.1% ber gfsk ? -89 ? -70 dbm sensitivity at 0.01% ber /4 dqpsk ? -90 ? -70 dbm 8 dpsk ? -83 ? -70 dbm is2062_64.book page 41 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 42 advance information ? 2016 microchip technology inc. note 1: standby mode: power-on without bluetooth link; link mode: with bluetooth link in low-power mode. 2: current consumption values are taken with the bm62 evb as a test platform, bat_in = 3.8v. distance between smart phone and evb is 30 cm. speaker is without loading. table 8-10: system current consumption of is2062 ( 1, 2 ) system status typical max. unit system off mode ? 10 a stop advertising (samsung s5 (sm-g900i)/android? 4.4.2) standby mode 0.57 ? ma link mode 0.5 ? ma esco link 15.1 ? ma a2dp link 14.3 ? ma stop advertising (iphone ? 6 / ios 8.4) standby mode 0.6 ? ma link mode 0.6 ? ma sco link 15.3 ? ma a2dp link 15.4 ? ma is2062_64.book page 42 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 43 is2062/64 8.1 timing specifications figure 8-1 and figure 8-2 illustrate the clock and data timing specifications. figure 8-1: timing for i 2 s modes (master/slave) figure 8-2: timing for pcm modes (master/slave) note 1: f s : 8,16, 32, 44.1, 48, 88.2 and 96 khz. 2: sclk0: 64 x f s / 256 x f s . 3: word length: 16-bit and 24-bit. is2062_64.book page 43 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 44 advance information ? 2016 microchip technology inc. figure 8-3 illustrates the audio interface timing and table 8-11 provides the audio interface timing specifi- cations. figure 8-3: audio interface timing note: test conditions: slave mode, f s = 48 khz, 24-bit data and slk0 period = 256 f s . table 8-11: audio interface timing specifications parameter symbol min typ max unit sclk0 duty ratio d sclk ?50? % sclk0 cycle time t sclkcy 50 ? ? ns sclk0 pulse width high t sclkch 20 ? ? ns sclk0 pulse width low t sclkcl 20 ? ? ns rfs0 set-up time to sclk0 rising edge t rfssu 10 ? ? ns rfs0 hold time from sclk0 rising edge t rfsh 10 ? ? ns dr0 hold time from sclk0 rising edge t dh 10 ? ? ns is2062_64.book page 44 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 45 is2062/64 9.0 packaging information 9.1 package marking information figure 9-1 illustrates the package marking information of the is2062/64 soc. figure 9-1: package marking information is2062_64.book page 45 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 46 is2062/64 9.2 package details figure 9-2 and figure 9-3 illustrate the package details of the is2062 soc. figure 9-2: is2062 - niau package details
is2062/64 ds60001409a - page 47 advance information ? 2016 microchip technology inc. figure 9-3: is2062 - sac305 package details
is2062/64 ds60001409a - page 48 advance information ? 2016 microchip technology inc. 9.3 footprint dimensions figure 9-4 illustrates the footprint dimensions of the is2062 soc. figure 9-4: is2062 footprint dimensions is2062_64.book page 48 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 49 advance information ? 2016 microchip technology inc. 9.4 package details figure 9-5 and figure 9-6 illustrate the package details of the IS2064 soc. figure 9-5: IS2064 -niau package details
? 2016 microchip technology inc. advance information ds60001409a - page 50 is2062/64 figure 9-6: IS2064 - sac305 package details
? 2016 microchip technology inc. advance information ds60001409a - page 51 is2062/64 9.5 footprint dimensions figure 9-7 illustrates the footprint dimensions of the IS2064 soc. figure 9-7: IS2064 footprint dimensions is2062_64.book page 51 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 52 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 52 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 53 is2062/64 10.0 reflow profile and storage condition figure 10-1 and figure 10-2 illustrate reflow profiles and stencil information of the is2062/64 soc. 10.1 stencil of smt assembly suggestion 10.1.1 stencil type & thickness ? laser cutting ? stainless steel ? thickness : 0.5 mm pitch, thickness more than 0.15 mm 10.1.2 aperture size and shape for terminal pad ? aspect ratio (width/thickness) more than 1.5 ? aperture shape - the stencil aperture is designed to match the pad size on the pcb - oval-shape opening is used to get the opti- mum paste release - rounded corners to minimize clogging - positive taper walls (5 tapering) with bottom opening larger than the top 10.1.3 aperture design for thermal pad ? small multiple openings are used instead of one big opening, see figure 10-1 ? 60~80% solder paste coverage ? rounded corners to minimize clogging ? positive taper walls (5 tapering) with bottom opening larger than the top, see figure 10-2 figure 10-1: reflow profile aperture design figure 10-2: stencil type is2062_64.book page 53 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 54 advance information ? 2016 microchip technology inc. 10.2 reflow condition figure 10-3 illustrates the reflow profile and the follow- ing are its specific features: ? standard condition: ipc/jedec j-std-020 ? preheat: 150~200 ~60~180 seconds ? average ramp-up rate (+217 to peak): 1~2 /sec max ? temperature maintain above 217: 60~150 sec- onds ?time within +5 of actual peak temperature: 20 ~ 40 seconds ? peak temperature: 260 +5/-0 ? ramp-down rate (peak to +217 ): +3 /sec. max ?time +25 to peak temperature: 8 minutes max ? cycle interval: 5 minutes figure 10-3: reflow profile is2062_64.book page 54 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 55 is2062/64 10.3 storage condition users must follow these specific storage conditions for the is2062/64 soc. ? calculated shelf life in the sealed bag: 24 months at <40 and <90% relative humidity (rh) ? once the bag is opened, devices that are sub- jected to reflow solder or other high temperature process must be mounted within 168 hours of fac- tory conditions, that is <30 /60% rh. figure 10-4 shows the is2062/64 soc bag labeling details. figure 10-4: is2062/64 soc storage conditions is2062_64.book page 55 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 56 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 56 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 57 is2062/64 11.0 ordering information table 11-1 provides the ordering information of the is2062/64 soc. note: the is2062/64 soc can be purchased through a microchip representative, go to http://www.microchip.com/ for ordering information. table 11-1: ordering information device bluetooth version package part number is2062 bluetooth 4.2, bdr/edr/ble soc with integrated 2 mic and stereo speaker output 7 x 7 x 0.9 mm, 56lga package is2062gm-012 IS2064 bluetooth 4.2, bdr/edr/ble, with integrated 1 mic and stereo speaker output and i 2 s digital interface 8 x 8 x 0.9 mm, 68lga package IS2064gm-012 is2062_64.book page 57 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 58 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 58 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 59 is2062/64 appendix a: reference circuit figure a-1 through figure a-5 illustrate the is2062 reference schematics for a stereo headset application. figure a-1: is2062 reference circuit for stereo headset
is2062/64 ds60001409a - page 60 advance information ? 2016 microchip technology inc. figure a-2: is2062 reference circuit for stereo headset
? 2016 microchip technology inc. advance information ds60001409a - page 61 is2062/64 figure a-3: is2062 reference circuit for stereo headset
is2062/64 ds60001409a - page 62 advance information ? 2016 microchip technology inc. figure a-4: is2062 reference circuit for stereo headset
? 2016 microchip technology inc. advance information ds60001409a - page 63 is2062/64 figure a-5: is2062 reference circuit for stereo headset note: all esd diodes in this schematics are reserved for testing. is2062_64.book page 63 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 64 advance information ? 2016 microchip technology inc. figure a-6 through figure a-9 illustrate the IS2064 reference schematic for a stereo headset application. figure a-6: IS2064 reference circuit for stereo headset
? 2016 microchip technology inc. advance information ds60001409a - page 65 is2062/64 figure a-7: IS2064 reference circuit for stereo headset
is2062/64 ds60001409a - page 66 advance information ? 2016 microchip technology inc. figure a-8: IS2064 reference circuit for stereo headset is2062_64.book page 66 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 67 is2062/64 figure a-9: IS2064 reference circuit for stereo headset note: all esd diodes in this schematics are reserved for testing. is2062_64.book page 67 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 68 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 68 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 69 is2062/64 appendix b: revision history revision a (may 2016) this is the initial released version of this document. is2062_64.book page 69 monday, may 16, 2016 6:05 pm
is2062/64 ds60001409a - page 70 advance information ? 2016 microchip technology inc. notes: is2062_64.book page 70 monday, may 16, 2016 6:05 pm
? 2016 microchip technology inc. advance information ds60001409a - page 71 is2062/64 the microchip web site microchip provides online support via our www site at www.microchip.com . this web site is used as a means to make files and information easily available to customers. accessible by using your favorite internet browser, the web site contains the following information: ? product support ? data sheets and errata, application notes and sample programs, design resources, user?s guides and hardware support documents, latest software releases and archived software ? general technical support ? frequently asked questions (faq), technical support requests, online discussion groups, microchip consultant program member listing ? business of microchip ? product selector and ordering guides, latest microchip press releases, listing of seminars and events, listings of microchip sales offices, distributors and factory representatives customer change notification service microchip?s customer notification service helps keep customers current on microchip products. subscribers will receive e-mail notification whenever there are changes, updates, revisions or errata related to a specified product family or development tool of interest. to register, access the microchip web site at www.microchip.com . under ?support?, click on ?customer change notification? and follow the registration instructions. customer support users of microchip products can receive assistance through several channels: ? distributor or representative ? local sales office ? field application engineer (fae) ? technical support customers should contact their distributor, representative or field application engineer (fae) for support. local sales offices are also available to help customers. a listing of sales offices and locations is included in the back of this document. technical support is available through the web site at: http://microchip.com/support. is2062_64.book page 71 monday, may 16, 2016 6:05 pm
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? 2016 microchip technology inc. advance information ds60001409a - page 73 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights unless otherwise stated. trademarks the microchip name and logo, the microchip logo, anyrate, dspic, flashflex, flexpwr, heldo, jukeblox, keeloq, keeloq logo, kleer, lancheck, link md, medialb, most, most logo, mplab, optolyzer, pic, picstart, pic32 logo, righttouch, spynic, sst, sst logo, superflash and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. clockworks, the embedded control solutions company, ethersynch, hyper speed control, hyperlight load, intellimos, mtouch, precision edge, and quiet-wire are registered trademarks of micr ochip technology incorporated in the u.s.a. analog-for-the-digital age, any capacitor, anyin, anyout, bodycom, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dynamic average matching, dam, ecan, ethergreen, in-circuit serial programming, icsp, inter-chip connectivity, jitterblocker, kleernet, kleernet logo, miwi, motorbench, mpasm, mpf, mplab certified logo, mplib, mplink, multitrak, netdetach, omniscient code generation, picdem, picdem.net, pickit, pictail, puresilicon, righttouch logo, real ice, ripple blocker, serial quad i/o, sqi, superswitcher, superswitcher ii, total endurance, tsharc, usbcheck, varisense, viewspan, wiperlock, wireless dna, and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. silicon storage technology is a registered trademark of microchip technology inc. in other countries. gestic is a registered tradem arks of microchip technology germany ii gmbh & co. kg, a subsidiary of microchip technology inc., in other countries. all other trademarks mentioned herein are property of their respective companies. ? 2016, microchip technology incorporated, printed in the u.s.a., all rights reserved. isbn: 978-1-5224-0584-9 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 == is2062_64.book page 73 monday, may 16, 2016 6:05 pm
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